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1300 Henley Court
Pullman, WA 99163
509.334.6306
www.digilentinc.com
Nexys4 DDR FPGA Board Reference Manual
Revised September 11, 2014
This manual applies to the Nexys4 DDR rev. C
DOC#: 502-292
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 1 of 29
1 Overview
The Nexys4 DDR board is a complete, ready-to-use digital circuit
development platform based on the latest Artix-7™ Field
Programmable Gate Array (FPGA) from Xilinx®. With its large,
high-capacity FPGA (Xilinx part number XC7A100T-1CSG324C),
generous external memories, and collection of USB, Ethernet, and
other ports, the Nexys4 DDR can host designs ranging from
introductory combinational circuits to powerful embedded
processors. Several built-in peripherals, including an
accelerometer, temperature sensor, MEMs digital microphone, a
speaker amplifier, and several I/O devices allow the Nexys4 DDR
to be used for a wide range of designs without needing any other
components.
The Artix-7 FPGA is optimized for high performance logic, and offers more capacity, higher performance, and more
resources than earlier designs. Artix-7 100T features include:
15,850 logic slices, each with four 6-input LUTs and 8 flip-flops
4,860 Kbits of fast block RAM
Six clock management tiles, each with phase-locked loop (PLL)
240 DSP slices
Internal clock speeds exceeding 450 MHz
On-chip analog-to-digital converter (XADC)
The Nexys4 DDR also offers an improved collection of ports and peripherals, including:
16 user switches
16 user LEDs
USB-UART Bridge
Two tri-color LEDs
12-bit VGA output
PWM audio output
3-axis accelerometer
Temperature sensor
128MiB DDR2
Serial Flash
Pmod for XADC signals
Digilent USB-JTAG port for FPGA
programming and
communication
The Nexys4 DDR is compatible with Xilinx’s new high-performance Vivado®
Design Suite as well as the ISE® toolset,
which includes ChipScope™ and EDK. Xilinx offers free WebPACK versions of these toolsets, so designs can be
implemented at no additional cost. The Nexys4 DDR is not supported by the Digilent Adept Utility.
The Nexys4 DDR
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Strany 1 - 1 Overview

1300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com Nexys4 DDR™ FPGA Board Reference Manual Revised September 11, 2014 This manual a

Strany 2

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Strany 3 - 2 Power Supplies

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Strany 4 - 3 FPGA Configuration

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Strany 5 - 3.1 JTAG Configuration

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Strany 6 - 3.2 Quad-SPI Configuration

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Strany 7 - 4 Memory

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Strany 8 - 5 Ethernet PHY

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Strany 9 - 6 Oscillators/Clocks

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Strany 10 - 8 USB HID Host

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Strany 11 - 8.1 HID Controller

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Strany 12 - 8.2 Keyboard

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Strany 13 - 8.3 Mouse

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Strany 14

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Strany 15 - R,G,B signals

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Strany 16 - Display Surface

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Strany 17 - 10 Basic I/O

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Strany 18

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Strany 19 - 10.1 Seven-Segment Display

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Strany 20 - 10.2 Tri-Color LEDs

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Strany 21 - 11 Pmod Connectors

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Strany 22 - 13 Temperature Sensor

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Strany 23 - 14 Accelerometer

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Strany 24 - 15 Microphone

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Strany 25 - PDM Signal

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Strany 26 - 16 Mono Audio Output

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Strany 27 - 16.1 Pulse-Width Modulation

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Strany 28 - 17 Built-In Self-Test

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Strany 29

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